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?2011 fairchild semiconductor corporation 1 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) motion-spm january 2012 tm FSB50550AB smart power module (spm ? ) features ? 500v r ds(on) =1.4 w( max ) 3-phase frfet inverter including high voltage integrated circuit (hvic) ? 3 divided negative dc-link terminals for inverter current sens- ing applications ? hvic for gate driving and undervoltage protection ? 3/5v cmos/ttl compatible, active-high interface ? optimized for low electromagnetic interference ? isolation voltage rating of 1500vrms for 1min. ? hvic temperature sensing ? embedded bootstrap diode in the package ? rohs compliant applications ? three-phase inverter driver for small power ac motor drives general description FSB50550AB is a tiny smart power module (spm ? ) based on frfet technology as a compact inverter solution for sma ll power motor drive applications such as fan motors and w ater suppliers. it is composed of 6 fast-recovery mosfet (frfet) , and 3 half-bridge hvics for frfet gate driving. fsb50550 ab provides low electromagnetic interference (emi) characteris tics with optimized switching speed. moreover, since it em ploys frfet as a power switch, it has much better ruggedness and larger safe operation area (soa) than that of an igbt-base d power module or one-chip solution. the package is opti mized for the thermal performance and compactness for the use in the built-in motor application and any other application where the assembly space is concerned. FSB50550AB is the best solution for the compact inverter providing the energy e fficiency, compactness, and low electromagnetic interference.
2 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) absolute maximum ratings inverter part (each frfet unless otherwise specified) control part (each hvic unless otherwise specified) bootstrap diode part (each bootstrap diode unless otherwise specified) thermal resistance total system note: 1. for the measurement point of case temperature t c , please refer to figure 4. 2. marking * is calculation value or design f actor. symbol parameter conditions rating units v pn dc link input voltage, drain-source voltage of each frfet 500 v *i d25 each frfet drain current, continuous t c = 25c 2.0 a *i d80 each frfet drain current, continuous t c = 80c 1.5 a *i dp each frfet drain current, peak t c = 25c, pw < 100 m s 5 a *i drms each frfet drain current, rms t c = 80c, f pwm < 20khz 1.1 a rms *p d maximum power dissipation t c = 25c, for each frfet 14.5 w symbol parameter conditions rating units v cc control supply voltage applied between v cc and com 20 v v bs high-side bias voltage applied between v b and v s 20 v v in input signal voltage applied between in and com -0.3 ~ v cc +0.3 v symbol parameter conditions rating units v rrmb maixmum repetitive reverse voltage 500 v * i fb forward current t c = 25c 0.5 a * i fpb forward current (peak) t c = 25c, under 1ms pulse width 1.5 a symbol parameter conditions rating units r q jc junction to case thermal resistance each frfet under inverter operat- ing condition (note 1) 8.6 c/w symbol parameter conditions rating units t j operating junction temperature -40 ~ 150 c t stg storage temperature -40 ~ 125 c v iso isolation voltage 60hz, sinusoidal, 1 minute, con- nection pins to heatsink 1500 v rms
3 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) pin descriptions note: source terminal of each low-side mosfet is not conn ected to supply ground or bias voltage ground insid e spm ? . external connections should be made as indicated in figure 3 figure 1. pin configuration and internal block dia gram (bottom view) pin number pin name pin description 1 com ic common supply ground 2 v b(u) bias voltage for u phase high side frfet driving 3 v cc(u) bias voltage for u phase ic and low side frfet driving 4 in (uh) signal input for u phase high-side 5 in (ul) signal input for u phase low-side 6 n.c n.c 7 v b(v) bias voltage for v phase high side frfet driving 8 v cc(v) bias voltage for v phase ic and low side frfet driving 9 in (vh) signal input for v phase high-side 10 in (vl) signal input for v phase low-side 11 n.c n.c 12 v b(w) bias voltage for w phase high side frfet driving 13 v cc(w) bias voltage for w phase ic and low side frfet driving 14 in (wh) signal input for w phase high-side 15 in (wl) signal input for w phase low-side 16 v ts output for hvic temperature sensing 17 p positive dcClink input 18 u, v s(u) output for u phase & bias voltage ground for high side frf et driving 19 n u negative dcClink input for u phase 20 n v negative dcClink input for v phase 21 v, v s(v) output for v phase & bias voltage ground for high side frf et driving 22 n w negative dcClink input for w phase 23 w, v s(w) output for w phase & bias voltage ground for high side f rfet driving (1) com (2) v b(u) (3) v cc(u) (4) in (uh) (5) in (ul) (6) n.c (7) v b(v) (8) v cc(v) (9) in (vh) (10) in (vl) (11) n.c (12) v b(w) (13) v cc(w) (14) in (wh) (15) in (wl) (16) (17) p (18) u, v s(u) (19) n u (20) n v (21) v, v s(v) (22) n w (23) w, v s(w) com vcc lin hin vb ho vs lo com vcc lin hin vb ho vs lo vts com vcc lin hin vb ho vs lo vts
4 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) electrical characteristics (t j = 25c, v cc =v bs =15v unless otherwise specified) inverter part (each frfet unless otherwise specified) control part (each hvic unless otherwise specified) bootstrap diode part (each bootstrap diode unless otherwise specified) note: 1. bv dss is the absolute maximum voltage rating between dra in and source terminal of each frfet inside spm ? . v pn should be sufficiently less than this value consid ering the effect of the stray inductance so that v ds should not exceed bv dss in any case. 2. t on and t off include the propagation delay time of the internal drive ic. listed values are measured at the labora tory test condition, and they can be different acco rding to the field applcations due to the effect of different pr inted circuit boards and wirings. please see figure 6 for the switching time definition with the switc hing test circuit of figure 7. 3. the peak current and voltage of each frfet duri ng the switching operation should be included in th e safe operating area (soa). please see figure 7 fo r the rbsoa test cir- cuit that is same as the switching test circuit. 4. v ts is only for sensing temperature of module and cann ot shutdown mosfets automatically. 5. built in bootstrap diode includes around 15 ? resistance characteristic. please refer to figure 2 . symbol parameter conditions min typ max units bv dss drain-source breakdown voltage v in = 0v, i d = 1ma (note 1) 500 - - v i dss zero gate voltage drain current v in = 0v, v ds = 500v - - 1 ma r ds(on) static drain-source on-resistance v cc = v bs = 15v, v in = 5v, i d = 1.2a - 1.0 1.4 w v sd drain-source diode forward voltage v cc = v bs = 15v, v in = 0v, i d = -1.2a - - 1.2 v t on switching times v pn = 300v, v cc = v bs = 15v, i d = 1.2a v in = 0v ? 5v, inductive load l=3mh high- and low-side frfet switching (note 2) - 800 - ns t off - 500 - ns t rr - 140 - ns e on - 90 - m j e off - 10 - m j rbsoa reverse-bias safe oper- ating area v pn = 400v, v cc = v bs = 15v, i d = i dp , v ds =bv dss , t j = 150c high- and low-side frfet switching (note 3) full square symbol parameter conditions min typ max units i qcc quiescent v cc current v cc =15v, v in =0v applied between v cc and com - - 200 m a i qbs quiescent v bs current v bs =15v, v in =0v applied between v b(u) -u, v b(v) -v, v b(w) -w - - 100 m a uv ccd low-side undervoltage protection (figure 8) v cc undervoltage protection detection level 7.4 8.0 9.4 v uv ccr v cc undervoltage protection reset level 8.0 8.9 9.8 v uv bsd high-side undervoltage protection (figure 9) v bs undervoltage protection detection level 7.4 8.0 9.4 v uv bsr v bs undervoltage protection reset level 8.0 8.9 9.8 v v ts hvic temperature sens- ing voltage output v cc =15v, t hvic =25c(note 4) 600 790 980 mv v ih on threshold voltage logic high level applied between in and com 2.9 - - v v il off threshold voltage logic low level - - 0.8 v symbol parameter conditions min typ max units v fb forward voltage i f = 0.1a, t c = 25c(note 5) - 2.5 - v t rrb reverse recovery time i f = 0.1a, t c = 25c - 80 - ns
5 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) recommended operating condition package marking & ordering information figure 2. built in bootstrap diode characteristics( typ.) symbol parameter conditions value units min. typ. max. v pn supply voltage applied between p and n - 300 400 v v cc control supply voltage applied between v cc and com 13.5 15 16.5 v v bs high-side bias voltage applied between v b and v s 13.5 15 16.5 v v in(on) input on threshold voltage applied between in and com 3.0 - v cc v v in(off) input off threshold voltage 0 - 0.6 v t dead blanking time for preventing arm-short v cc =v bs =13.5 ~ 16.5v, t j 150c 1.0 - - m s f pwm pwm switching frequency t j 150c - 15 - khz device marking device package reel size packing type qua ntity FSB50550AB FSB50550AB spm23dd-21l - - 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 built in bootstrap diode v f -i f characteristic i f [a] v f [v] tc=25c
6 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) note: 1. parameters for bootsrap circuit elements are depe ndent on pwm algorithm. for 15 khz of switching fre quency, typical example of parameters is shown abov e. 2. rc coupling(r 5 and c 5 ) and c 4 at each input of spm ? and micom (indicated as dotted lines) may be used to prevent improper signal due to surge noise. sign al input of spm ? is compatible with standard cmos or lsttl outputs. 3. bold lines should be short and thick in pcb patte rn to have small stray inductance of circuit, which results in the reduction of surge voltage. bypass capacitors such as c 1 , c 2 and c 3 should have good high-frequencycharacteristics to absorb high-frequency ripple current. figure 3. recommended cpu interface and bootstrap circuit with parameters note: attach the thermocouple on top of the heatsink-side of spm ? (between spm ? and heatsink if applied) to get the correct temper ature measurement. figure 4. case temperature measurement figure 5. temperature profile of v ts (typ.) hin lin output note 0 0 z both frfet off 0 1 0 low side frfet on 1 0 v dc high side frfet on 1 1 forbidden shoot through open open z same as (0,0) com vcc lin hin vb ho vs lo p n r 3 inverter output c 3 c 1 micom 15v line 10 m f one leg diagram of spm these values depend on pwm control algorithm * example of bootstrap paramters: c 1 = c 2 = 1 m f ceramic capacitor r 5 c 5 v dc c 2 vts * example circuit : w phase c 4 v 20 40 60 80 100 120 140 160 0.5 1.0 1.5 2.0 2.5 3.0 3.5 v ts [v] t hvic [deg]
7 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) figure 6. switching time definition figure 7. switching and rbsoa(single-pulse) test ci rcuit (low-side) figure 8. undervoltage protection (low-side) figure 9. undervoltage protection (high-side) t on t rr i rr 100% of i d 120% of i d (a) turn-on t off (b) turn-off i d v ds v ds i d v in v in 10% of i d com vcc lin hin vb ho vs lo one-leg diagram of spm i d v cc c bs l v dc + v ds - vts uv ccd uv ccr input signal uv protection status low-side supply, v cc mosfet current reset detection reset uv bsd uv bsr input signal uv protection status high-side supply, v bs mosfet current reset detection reset
8 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) note: 1. about pin position, refer to figure 2. 2. rc coupling(r 5 and c 5 , r 4 and c 6 ) and c 4 at each input of spm ? and micom are useful to prevent improper input sig nal caused by surge noise. 3. the voltage drop across r 3 affects the low side switching performance and the bootstrap characteristics since it is placed betwe en com and the source terminal of the low side mosfet. for this reason, the voltage drop across r 3 should be less than 1v in the steady-state. 4. ground wires and output terminals, should be thi ck and short in order to avoid surge voltage and ma lfunction of hvic. 5. all the filter capacitors shoud be connected clo se to spm ? , and they should have good characteristics for rej ecting high-frequency ripple current. figure 10. example of application circuit com vcc lin hin vb ho vs lo com vcc lin hin vb ho vs lo com vcc lin hin vb ho vs lo (1 ) com (2 ) v b(u) (3 ) v cc(u) (4 ) in (uh) (5 ) in (ul) (6 ) n.c (7 ) v b(v) (8 ) v cc(v) (9 ) in (vh) (10) in (vl) (11) (12) v b(w) (13) v cc(w) (14) in (wh) (15) in (wl) (16 ) (17) p (18 ) u , v s(u) (19) n u (22) n w micom c 1 15- v supply c 3 v dc c 2 r 3 r 4 c 6 r 5 c 5 for current sensing and protection v ts (21 ) v , v s(v) (20) n v (23) w , v s(w) c 4 m v ts n.c
9 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) detailed package outline drawings dimension unit : [mm]
10 www.fairchildsemi.com FSB50550AB rev. a FSB50550AB smart power module (spm?) rev. i38 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild se miconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trade marks. * ezswitch? and flashwriter ? are trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. fairchild does not a ssume any liability arising out of the application o r use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchi lds worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchilds products are not authorized for use as critical components in life support devices or syst ems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or s ystems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the u ser. 2. a critical component in any component of a life s upport, device, or system whose failure to perform can be reasonably e xpected to cause the failure of the life support device or system, o r to affect its safety or effectiveness. product status definitions definition of terms build it now? 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